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DeepSeek’s Sparse-Computing Wave Spurs Chinese Chipmakers; MoAI Completes Nearly RMB 1 Billion Round

MoAI has completed a nearly RMB 1 billion C+ financing round only five months after its previous round. The article connects the company’s sparse-inference chips with the growing demand for efficient AI computing and the renewed interest in specialized do

It's the first time I've ever been to a temple in China.
QbitAI is public.

Recently, the completion of the AI (also known as the AI) has been approached.RMB 1 billion in C+ round financing。

With its first round of funding of nearly 1 billion yuan in the last five months alone, MCHR has completed two rounds in a row in a short period of time, reflecting how the capital market is looking at its growth.Special scarcity reasoning chipsHigh recognition of technological barriers and commercialization progress in the field.

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With the pioneering advantages of technological accumulation and product deployment, as well as the accelerated pace of commercialization, MECHOR has led the way in the window of concentrated release of the demand for cartographic reasoning, further highlighting the differential advantages of scarce specialty reasoning chips.

Bet on scarcity computing, getting out of the differential chip route

At present, the continuous evolution of the big model technology architecture has led to a decline in the number of new models.Rare computing is moving from an auxiliary optimization tool to an important position in AI computing design。

With the accelerated application of the mixed expert (MoE) architecture, large model reasoning presents clear conditional computational characteristics; at the same time, the sparse structure in weights and activations also provides space for reducing redundant computation.

Take the example of DeepSeek-V4-Pro, which has a total parameter of about 1.6 trillion, but only activates about 49 billion parameters per word, or about 3% of the total parameter.

How to convert computational savings at the model level into real logical efficiency improvements and cost reductions is becoming a key issue that needs to be addressed in AI.

In order to deal effectively with such loads,The choice of chip architecture is a key variable。

Generic GPUs require a variety of loads, including training, reasoning, and scientific computing, and it is difficult to optimize algorithms for specific rare patterns for deep synchronization with hardware.

Specialized chips with scant reasoning can be designed in collaboration with algorithms, compilers and hardware to reduce inefficient computing and data transfer costs. The value of this architectural difference is being reassessed by the industry.

Since its inception in 2018, it has been focusing on the field of rarefied computing.Lithium weight dilution + activation of dilution of lithium double dilution algorithmIt has been a long time coming, and it has been a long time coming.Software-Hardware Algorithms - A technical system designed in collaboration with hardware。

To drive this technological system to become a mature chip product, it is necessary to have complete engineering capabilities for algorithms, compilers, chip architectures and software tool chains.

Merch founding team members come from Carnegie Mellon University and top semiconductor companies such as Intel, Qualcomm, and Marvel, with backgrounds in algorithm research and chip engineering, dozens of products and over 5 billion chip production experiences.

Thanks to this engineering capability, the effectiveness of MICHOR products has been verified in international authority benchmark tests.

In the MLPerfTM Inference test, the S30 calculation card is in some of the test categories involved.Three consecutive titlesIn mainstream tasks such as computer vision, natural language processing, its energy efficiency compared to unit computational reasoning throughput remains industry-leading, verifying the engineering feasibility of specialized scarcity reasoning programs under real data center load.

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Multi-scenes landing and ecological co-construction, scarcity computing entering a new phase

Scale deployment is further consolidating the lead in the field of rare-earth reasoning chips.

The concept of a logic cluster built on a self-developed chip is already in development.Northwest, Southwest, Watsong, and NorthwestOn this basis, the commercialization of the core is accelerating in full:

Revenue achieved in the third quarter of 2026Multiplied growthRare computing is being deeply integrated into the construction of our computing system and the development of the service industry.

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Specifically, in order to support the construction of new computing infrastructure, MCHOR participated in the first offshore computing token plant project in the country built by Shanghai State-owned platform company.

The project relies on offshore wind power green electricity, sea water cooling to reduce PUE and electricity costs, but the reasoning costs of general GPUs are still likely to offset the reduction dividends that green electricity brings. To address this pain point, the ink, with its rare architectural advantages, combined with an algorithmic mixed-construction pattern, reduces the cost of single-Token reasoning from the chip side, achieving a combination of the advantages of lithium-ion and lithium-ion architecture reduction.

With a focus on AI and time-space big data frontier areas, microchips provide a high-performance computing base for applications such as sparse computing for time-space big data intelligence.

In collaboration with the Institute of Earth and Space Technology, the Shanghai-Hong Kong International Science and Technology Innovation Center of the University of Beijing, MCHOR has implemented two mainstream international models of remote imaging intelligence analysis based on MCHOR's self-developed dilution technology for adaptation and testing on MCHOR algorithm cards:

With almost no loss of operational accuracy and no need to re-train downstream tasks, it is reasonable to increase the maximum throughput.2.88 timesModel compression reaches maximum7.64 times。

This means that computations at the model level can be converted into actual processing efficiencies through software-hardware collaboration, allowing for less computational and less time-consuming interpretation of large-scale remote sensing images, and providing engineering validation for reluctant computational models to undertake basic geospatial model reasoning.

As real-world business needs are integrated into chip design and software development, Mcore is also transforming technology accumulation and scale deployment experiences into ongoing iterative capabilities, driving rare specialty reasoning chips from the ground up.It can be used to aim at a target.We're moving forward.

Product generation level, new generation of card productsSP200It will be officially released before the end of the year.

At the ecological level, Sparse-native Efficient Computing Architecture (SECA) will soon release a rare native efficient computing architecture that will strengthen support for large model rational deployment and cluster operation, further reducing model migration and deployment thresholds.

In addition, MCU extends its technological advantages to the ecological level, further enhancing its industry influence in the field of rare computing.

In August of this year, Mercer launched the R&D Alliance for Smaller Computing Production, focusing on cutting-edge research, key technological breakthroughs and results transformation, and building on its own technology accumulation and industrial practices as the basis for industry collaborative innovation to drive the continued development of Smaller Computing technology.

The competition for the big model isI'm going from being more intelligent to being smarter.。

As the continuous expansion of model sizes is increasingly constrained by computational costs and energy consumption, the core proposition of the industry has changed:

How to carry more intelligence with less computation.

Rare computing is one of the direct answers to this proposition.

The value of the chip is that it will compete for the next stage of Chinese AI chips, providing an opportunity for a new generation of AI chips.Technological paths of differentiation。

*This text is licensed for publication by Qubit, and the views are solely those of the original authors.